diff --git a/diylc/diylc-core/src/org/diylc/presenter/update.xml b/diylc/diylc-core/src/org/diylc/presenter/update.xml
index 650876ed..82263ab3 100644
--- a/diylc/diylc-core/src/org/diylc/presenter/update.xml
+++ b/diylc/diylc-core/src/org/diylc/presenter/update.xml
@@ -4183,7 +4183,7 @@
 				<minor>34</minor>
 				<build>0</build>
 			</versionNumber>
-			<releaseDate>2022-11-16 00:00:00.000 CET</releaseDate>
+			<releaseDate>2022-12-09 00:00:00.000 CET</releaseDate>
 			<name></name>
 			<changes>
 				<org.diylc.appframework.update.Change>
diff --git a/diylc/diylc-library/lib/diylc-core.jar b/diylc/diylc-library/lib/diylc-core.jar
index 06f6a37d..cabc37f4 100644
Binary files a/diylc/diylc-library/lib/diylc-core.jar and b/diylc/diylc-library/lib/diylc-core.jar differ
diff --git a/diylc/diylc-swing/flatpak/com.diy_fever.DIYLayoutCreator.metainfo.xml b/diylc/diylc-swing/flatpak/com.diy_fever.DIYLayoutCreator.metainfo.xml
index f37859dd..bf4eb606 100644
--- a/diylc/diylc-swing/flatpak/com.diy_fever.DIYLayoutCreator.metainfo.xml
+++ b/diylc/diylc-swing/flatpak/com.diy_fever.DIYLayoutCreator.metainfo.xml
@@ -37,6 +37,22 @@
   <update_contact>nbenitezl_AT_gmail.com</update_contact>
   <content_rating type="oars-1.1"/>
   <releases>
+  	<release version="4.34.0" date="2022-12-09">
+         <description>
+           <ul>
+             <li>[New Feature] Added 'Project Explorer' pane in the right-hand side for quick access to components</li>
+             <li>[New Feature] Keyboard shortcuts for toggling layer visibility using Ctrl + 1 through Ctrl + 6</li>
+             <li>[Improvement] Circuit analysis algorithm that supports netlist extraction, 'Highlight connected Areas' and 'Guitar Wiring Analyzer' features improved to take PCB trace layer and component z-order into account for better accuracy</li>
+             <li>[Improvement] Potentiometer bodies are no longer considered as conductive surfaces to avoid unwanted shorts</li>
+             <li>[Improvement] Optimized memory usage when having many Hookup Wire components</li>
+             <li>[Improvement] Improved conductivity tracking of Terminal Strip</li>
+             <li>[Bug Fix] Do not apply any user-default property values when creating a standard datasheet model (e.g. a capacitor)</li>
+             <li>[Bug Fix] Variants of boards having explicit sizing mode fail when trying to add to a project</li>
+             <li>[Bug Fix] Font settings (e.g. bold) sometimes bleed into wrong component</li>
+           </ul>
+         </description>
+         <url>https://github.com/bancika/diy-layout-creator/releases/tag/v4.34.0</url>
+     </release>
   	<release version="4.33.0" date="2022-11-16">
          <description>
            <ul>
diff --git a/diylc/diylc-swing/lib/diylc-core.jar b/diylc/diylc-swing/lib/diylc-core.jar
index 06f6a37d..cabc37f4 100644
Binary files a/diylc/diylc-swing/lib/diylc-core.jar and b/diylc/diylc-swing/lib/diylc-core.jar differ
diff --git a/diylc/diylc-swing/library/main.jar b/diylc/diylc-swing/library/main.jar
index f20195bb..9b0a89b8 100644
Binary files a/diylc/diylc-swing/library/main.jar and b/diylc/diylc-swing/library/main.jar differ