Trace cut doesn't affect continuity of vero board traces

This commit is contained in:
Bane Stojkovic
2022-12-23 08:24:43 +01:00
parent 22e9bbaa20
commit 8211976044
2 changed files with 12 additions and 2 deletions
@@ -4290,6 +4290,10 @@
<changeType>IMPROVEMENT</changeType>
<description>Improved find tool usability, make the screen pan to the selected components</description>
</org.diylc.appframework.update.Change>
<org.diylc.appframework.update.Change>
<changeType>BUG_FIX</changeType>
<description>Trace cut doesn't affect continuity of vero board traces</description>
</org.diylc.appframework.update.Change>
<org.diylc.appframework.update.Change>
<changeType>BUG_FIX</changeType>
<description>DIL IC pin labels incorrect in the netlist</description>
@@ -4300,7 +4304,7 @@
</org.diylc.appframework.update.Change>
<org.diylc.appframework.update.Change>
<changeType>BUG_FIX</changeType>
<description>Upon starting or opening a project, the ruler is slightly misaligned with the project boundaries</description>
<description>Upon starting or opening a project, the ruler is slightly miss-aligned with the project boundaries</description>
</org.diylc.appframework.update.Change>
</changes>
<url>https://github.com/bancika/diy-layout-creator/releases</url>