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This commit is contained in:
Bane Stojkovic
2022-03-05 14:29:43 +01:00
parent 3dcc4a1638
commit b646d90179
34 changed files with 40660 additions and 1765 deletions
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diylc/diylc-swing/RegressionTestRunner.launch
+1 -1
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@@ -9,6 +9,6 @@
<booleanAttribute key="org.eclipse.jdt.launching.ATTR_EXCLUDE_TEST_CODE" value="true"/>
<stringAttribute key="org.eclipse.jdt.launching.MAIN_TYPE" value="org.diylc.RegressionTestRunner"/>
<stringAttribute key="org.eclipse.jdt.launching.MODULE_NAME" value="diylc-swing"/>
<stringAttribute key="org.eclipse.jdt.launching.PROGRAM_ARGUMENTS" value="&quot;C:\Users\bancika\Documents\GitHub\diy-layout-creator\diylc-regression-data&quot; TEST user-files"/>
<stringAttribute key="org.eclipse.jdt.launching.PROGRAM_ARGUMENTS" value="&quot;C:\Users\bancika\Documents\GitHub\diy-layout-creator\diylc-regression-data&quot; PREPARE user-files"/>
<stringAttribute key="org.eclipse.jdt.launching.PROJECT_ATTR" value="diylc-swing"/>
</launchConfiguration>
diylc/diylc-swing/dict.txt
-3
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@@ -26,7 +26,6 @@ A-O-I REGULATOR
AWG
And
C-B-E BJT
CP1
Check Trace Proximity
D-G-S JFET
D-G-S MOSFET
@@ -78,7 +77,6 @@ PCB
PNP
Panel
Português
RECTC1
Rev log
S-G-D JFET
S-G-D MOSFET
@@ -87,7 +85,6 @@ SPDT
SPDT (Center OFF)
SPST
Srpski
TM2
Tick Width
Ticks
Wiring