Omit boards, wires, traces, terminals, etc from Spice netlist output

diylc/diylc-core/src/main/resources/update.xml

@@ -265,6 +265,10 @@
 					<changeType>IMPROVEMENT</changeType>
 					<description>Improved robustness of series/parallel graph construction code used in circuit analysis</description>
 				</org.diylc.appframework.update.Change>
+				<org.diylc.appframework.update.Change>
+					<changeType>IMPROVEMENT</changeType>
+					<description>Omit boards, wires, traces, terminals, etc from Spice netlist output</description>
+				</org.diylc.appframework.update.Change>
 				<org.diylc.appframework.update.Change>
 					<changeType>BUG_FIX</changeType>
 					<description>Moving selected components with a mouse doesn't register file modification action and doesn't enable Undo action</description>

diylc/diylc-library/src/main/java/org/diylc/netlist/SpiceAnalyzer.java

@@ -61,9 +61,14 @@ public class SpiceAnalyzer extends NetlistAnalyzer implements INetlistAnalyzer {
   
   protected Summary summarize(Netlist netlist, Node preferredOutput) throws TreeException {
     // grab all components that are in the netlist
-    List<IDIYComponent<?>> allComponents = netlist.getComponents();
-    
     List<Group> groups = netlist.getSortedGroups();
+
+    List<IDIYComponent<?>> allComponents = groups.stream()
+            .flatMap(x -> x.getNodes().stream()
+                    .map(y -> y.getComponent()))
+            .distinct()
+            .collect(Collectors.toList());
+
     int unconnectedIndex = groups.size();
     
     int maxLen = 0;