09e96a03a3
Better "Expand Selection" logic. Works well with conductive components
...
like traces and wires and regular components like resistors and
capacitors
2020-03-31 00:58:42 +02:00
a37b1e49e3
Add ability to merge disjoint continuity areas
2020-03-30 13:56:42 +02:00
5809c721d7
Added "Dot Spacing" property in project settings that shows dots on
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every N-th grid line intersection
2020-03-27 18:49:30 +01:00
fd079f44be
4P5T and DP5T guitar switches were not properly configured for internal
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pin connections
2020-03-27 17:18:27 +01:00
32eb3a366a
When deleting trace cuts from a vero board, highlight connected areas
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would still render the area from before the cut was deleted
2020-03-27 10:20:58 +01:00
382a304793
release 4.0.1
2020-03-26 18:38:01 +01:00
8364d05a94
Added ability to set board size explicitly by typing in dimensions,
...
instead of dragging two control points
2020-03-26 18:02:16 +01:00
759df0ac8f
Added read-only "Length" property to curved components (i.e. "Hookup
...
Wire") that calculates total length of the curve
2020-03-26 01:12:00 +01:00
ec0d2a686c
Added "Renumber On Paste" option in the "Config" menu
2020-03-25 20:55:06 +01:00
4718ba6592
update file icons
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scroll the main pane to center after starting
2020-03-25 00:16:19 +01:00
b27b89b900
new icon
2020-03-24 16:11:13 +01:00
6d04ac8e3d
new smaller format icons
2020-03-24 12:13:59 +01:00
a6b7debfd7
Added "Snap To Objects" feature that snaps control points to control
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points of the nearest components
2020-03-23 23:04:02 +01:00
25c86ad4e9
yet another icon
2020-03-23 16:56:16 +01:00
c12623c523
yet another icon version
2020-03-23 12:29:42 +01:00
015677c567
Added "Tape Measure" component
2020-03-23 00:00:29 +01:00
8f0c0adcb4
Add null protection for announcements
2020-03-22 12:14:01 +01:00
e93a82f9fd
reorganize resource files
2020-03-22 00:38:19 +01:00
7477c606f4
mac build fixes
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move update and variants file to core project and integrate into Jar
2020-03-21 23:58:43 +01:00
71f5bcd1f7
java 8 and mac build
2020-03-21 12:18:55 +03:00
bb3b37f23b
patched osx component loading issue, investigate further
2019-03-25 08:21:20 +01:00
2294ac45a2
copy loaded file as-is to backup folder
2019-03-24 21:37:37 +01:00
5598f22b2f
Added "Auto-Wrap Label" component
...
extracted string rendering function into a separate class
2019-03-24 08:34:28 +01:00
812b7adb28
remove newPoints and reuse points for backward compatibility
2019-03-23 22:44:09 +01:00
5c47ff1ef0
added ability to include or exclude switches from netlist analyzer
2019-03-23 18:05:28 +01:00
b46f46aa99
When pasting a group of components that contain at least one "PCB Text"
...
instance, some of the other components get rendered mirrored while
position the pasted components
2019-03-22 22:29:05 +01:00
9366f9c602
Auto-save plugin now works by periodically creating project backups in
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user\.diylc\autoSave directory and maintains file history, keeping the
last X versions of the file. Maximum size for all backups is
configurable and pre-set to 64MB
2019-03-22 16:38:01 +01:00
14a994e68f
Improve "Expand Selection" feature to use the same algorithm as netlists
...
for better precision<
2019-03-22 00:47:28 +01:00
78dcd27e1d
Some schematic symbols (transistors, potentiometer...) get into bad
...
state when rotated and flipped at the same time
2019-03-20 20:06:38 +01:00
714db98afa
deleted old file
...
fixed pin rendering on some components
2019-03-20 19:27:46 +01:00
2faa2c6d61
reorganized "stretchable" property into more granular control at the
...
point level
added controlable label to pot symbol and transistor symbols
2019-03-20 19:21:31 +01:00
a0601cc83d
better default label position on schematic symbols
2019-03-19 19:03:21 +01:00
6c241b3180
added third control point to leaded components to set label position
2019-03-18 22:49:27 +01:00
838adc9a51
reorganize netlist code, comment out unused functions
2019-03-14 22:36:43 +01:00
41d2b73cca
Merge switch configurations that yield with the same effective wiring
...
for "Analyze Guitar Wirings" module, for more compact report
2019-03-14 22:26:49 +01:00
3d0f9554b0
Honor all possible combinations of "DIP Switch" positions when creating
...
a netlist
2019-03-14 10:32:51 +01:00
0c21e013b4
improve node display for single point componenets
2019-03-14 10:03:04 +01:00
f8e24b0937
Improve performance of netlist calculations
2019-03-14 00:08:39 +01:00
e9a2785344
Honor "Terminal Strip" connectivity when creating a netlist
2019-03-13 20:54:24 +01:00
4de3b6d97c
Output SPICE node names in the "Nxxx" format
...
join all nodes connected to GND together
2019-03-13 19:23:35 +01:00
92a2bb9809
fix "Ground Symbol" jumping
2019-03-10 22:58:36 +01:00
1bc11e09ab
release
2019-03-10 22:36:09 +01:00
49d93b42a4
update.xml
2019-03-10 17:51:21 +01:00
b279510e5c
Detect when a file is created with a newer version of DIYLC and show a
...
warning
Force correct prefix for transistors in spice
2019-03-10 09:03:22 +01:00
a83cda9ecd
custom XStream converters for more compact files
2019-03-09 21:45:34 +01:00
f63b422a8c
Cleaner XML format for .DIY files with less cross-references
...
pinout update
2019-03-09 20:15:36 +01:00
7af919b303
move section handling to base component interface
...
do analysis in background thread
2019-03-09 18:01:42 +01:00
1c1ec2fcf5
refactor transistor packages with a base class, add pinouts
2019-03-09 17:24:34 +01:00
54ff518438
basic implementation of spice exporter
2019-03-09 14:46:00 +01:00
8ed2c0c9a5
"Mini Toggle Switch" doesn't reset body size after changing terminal
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spacing
2019-03-08 18:36:37 +01:00
bancika