BDC/diy-layout-creator
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Code Issues Packages Projects Releases Wiki Activity
1,483 Commits 32 Branches 146 Tags
a385d467a4aff795c7dd7e124dcf872ecb158baa
Commit Graph

281 Commits

Author SHA1 Message Date
bancika 09e96a03a3 Better "Expand Selection" logic. Works well with conductive components 
like traces and wires and regular components like resistors and
capacitors
 2020-03-31 00:58:42 +02:00
bancika 1768dbabfc added proto board 2020-03-30 13:56:52 +02:00
bancika 7d46f49788 Humbucker doesn't render second coil poles properly in certain scenarios 2020-03-27 20:02:39 +01:00
bancika f11bb639b9 Issues with circuit analysis introduced in version 4.0.1. Wires and 
jumpers are made non-conductive by mistake.
 2020-03-27 17:30:55 +01:00
bancika 32eb3a366a When deleting trace cuts from a vero board, highlight connected areas 
would still render the area from before the cut was deleted
 2020-03-27 10:20:58 +01:00
bancika 382a304793 release 4.0.1 2020-03-26 18:38:01 +01:00
bancika 8364d05a94 Added ability to set board size explicitly by typing in dimensions, 
instead of dragging two control points
 2020-03-26 18:02:16 +01:00
bancika 759df0ac8f Added read-only "Length" property to curved components (i.e. "Hookup 
Wire") that calculates total length of the curve
 2020-03-26 01:12:00 +01:00
bancika e429f65ed2 Threads on 1/4" Closed Jack were not rendered at all 2020-03-25 20:06:51 +01:00
bancika 4718ba6592 update file icons 
scroll the main pane to center after starting
 2020-03-25 00:16:19 +01:00
bancika b27b89b900 new icon 2020-03-24 16:11:13 +01:00
bancika 25c86ad4e9 yet another icon 2020-03-23 16:56:16 +01:00
bancika c12623c523 yet another icon version 2020-03-23 12:29:42 +01:00
bancika 015677c567 Added "Tape Measure" component 2020-03-23 00:00:29 +01:00
bancika bff1b670d5 rework splash screen 2020-03-22 12:13:43 +01:00
bancika 7477c606f4 mac build fixes 
move update and variants file to core project and integrate into Jar
 2020-03-21 23:58:43 +01:00
admin 71f5bcd1f7 java 8 and mac build 2020-03-21 12:18:55 +03:00
Branislav Stojkovic fcea5975a8 change backup folder name 2019-03-24 21:38:27 +01:00
Branislav Stojkovic 5598f22b2f Added "Auto-Wrap Label" component 
extracted string rendering function into a separate class
 2019-03-24 08:34:28 +01:00
Branislav Stojkovic 812b7adb28 remove newPoints and reuse points for backward compatibility 2019-03-23 22:44:09 +01:00
Branislav Stojkovic 9fd5a8fe96 redo relaxed validation 2019-03-23 19:11:06 +01:00
Branislav Stojkovic 5c47ff1ef0 added ability to include or exclude switches from netlist analyzer 2019-03-23 18:05:28 +01:00
Branislav Stojkovic b46f46aa99 When pasting a group of components that contain at least one "PCB Text" 
instance, some of the other components get rendered mirrored while
position the pasted components
 2019-03-22 22:29:05 +01:00
Branislav Stojkovic 48266d3b27 fix the 3rd control point when copy-pasting 2019-03-22 21:04:54 +01:00
Branislav Stojkovic 1d038b5f8c better log 2019-03-22 16:39:08 +01:00
Branislav Stojkovic 14a994e68f Improve "Expand Selection" feature to use the same algorithm as netlists 
for better precision<
 2019-03-22 00:47:28 +01:00
Branislav Stojkovic 78dcd27e1d Some schematic symbols (transistors, potentiometer...) get into bad 
state when rotated and flipped at the same time
 2019-03-20 20:06:38 +01:00
Branislav Stojkovic 714db98afa deleted old file 
fixed pin rendering on some components
 2019-03-20 19:27:46 +01:00
Branislav Stojkovic 2faa2c6d61 reorganized "stretchable" property into more granular control at the 
point level

added controlable label to pot symbol and transistor symbols
 2019-03-20 19:21:31 +01:00
Branislav Stojkovic a0601cc83d better default label position on schematic symbols 2019-03-19 19:03:21 +01:00
Branislav Stojkovic 9925d58347 keep label oriantation the same between the two modes 2019-03-18 22:57:30 +01:00
Branislav Stojkovic 6c241b3180 added third control point to leaded components to set label position 2019-03-18 22:49:27 +01:00
Branislav Stojkovic 838adc9a51 reorganize netlist code, comment out unused functions 2019-03-14 22:36:43 +01:00
Branislav Stojkovic 41d2b73cca Merge switch configurations that yield with the same effective wiring 
for "Analyze Guitar Wirings" module, for more compact report
 2019-03-14 22:26:49 +01:00
Branislav Stojkovic 3d0f9554b0 Honor all possible combinations of "DIP Switch" positions when creating 
a netlist
 2019-03-14 10:32:51 +01:00
Branislav Stojkovic 0c21e013b4 improve node display for single point componenets 2019-03-14 10:03:04 +01:00
Branislav Stojkovic f8e24b0937 Improve performance of netlist calculations 2019-03-14 00:08:39 +01:00
Branislav Stojkovic e9a2785344 Honor "Terminal Strip" connectivity when creating a netlist 2019-03-13 20:54:24 +01:00
Branislav Stojkovic 4de3b6d97c Output SPICE node names in the "Nxxx" format 
join all nodes connected to GND together
 2019-03-13 19:23:35 +01:00
Branislav Stojkovic 92a2bb9809 fix "Ground Symbol" jumping 2019-03-10 22:58:36 +01:00
Branislav Stojkovic 440b953531 fix orientation parsing 2019-03-10 22:53:01 +01:00
Branislav Stojkovic f20b896184 release 2019-03-10 22:32:34 +01:00
Branislav Stojkovic 49d93b42a4 update.xml 2019-03-10 17:51:21 +01:00
Branislav Stojkovic b279510e5c Detect when a file is created with a newer version of DIYLC and show a 
warning

Force correct prefix for transistors in spice
 2019-03-10 09:03:22 +01:00
Branislav Stojkovic f63b422a8c Cleaner XML format for .DIY files with less cross-references 
pinout update
 2019-03-09 20:15:36 +01:00
Branislav Stojkovic 7af919b303 move section handling to base component interface 
do analysis in background thread
 2019-03-09 18:01:42 +01:00
Branislav Stojkovic 1c1ec2fcf5 refactor transistor packages with a base class, add pinouts 2019-03-09 17:24:34 +01:00
Branislav Stojkovic 8ccdd84a6f add support to map DIYLC pin indices to spice 2019-03-09 16:47:18 +01:00
Branislav Stojkovic 54ff518438 basic implementation of spice exporter 2019-03-09 14:46:00 +01:00
Branislav Stojkovic 8ed2c0c9a5 "Mini Toggle Switch" doesn't reset body size after changing terminal 
spacing
 2019-03-08 18:36:37 +01:00