Branislav Stojkovic
2294ac45a2
copy loaded file as-is to backup folder
2019-03-24 21:37:37 +01:00
Branislav Stojkovic
5598f22b2f
Added "Auto-Wrap Label" component
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extracted string rendering function into a separate class
2019-03-24 08:34:28 +01:00
Branislav Stojkovic
812b7adb28
remove newPoints and reuse points for backward compatibility
2019-03-23 22:44:09 +01:00
Branislav Stojkovic
5c47ff1ef0
added ability to include or exclude switches from netlist analyzer
2019-03-23 18:05:28 +01:00
Branislav Stojkovic
b46f46aa99
When pasting a group of components that contain at least one "PCB Text"
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instance, some of the other components get rendered mirrored while
position the pasted components
2019-03-22 22:29:05 +01:00
Branislav Stojkovic
9366f9c602
Auto-save plugin now works by periodically creating project backups in
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user\.diylc\autoSave directory and maintains file history, keeping the
last X versions of the file. Maximum size for all backups is
configurable and pre-set to 64MB
2019-03-22 16:38:01 +01:00
Branislav Stojkovic
14a994e68f
Improve "Expand Selection" feature to use the same algorithm as netlists
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for better precision<
2019-03-22 00:47:28 +01:00
Branislav Stojkovic
78dcd27e1d
Some schematic symbols (transistors, potentiometer...) get into bad
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state when rotated and flipped at the same time
2019-03-20 20:06:38 +01:00
Branislav Stojkovic
714db98afa
deleted old file
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fixed pin rendering on some components
2019-03-20 19:27:46 +01:00
Branislav Stojkovic
2faa2c6d61
reorganized "stretchable" property into more granular control at the
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point level
added controlable label to pot symbol and transistor symbols
2019-03-20 19:21:31 +01:00
Branislav Stojkovic
a0601cc83d
better default label position on schematic symbols
2019-03-19 19:03:21 +01:00
Branislav Stojkovic
6c241b3180
added third control point to leaded components to set label position
2019-03-18 22:49:27 +01:00
Branislav Stojkovic
838adc9a51
reorganize netlist code, comment out unused functions
2019-03-14 22:36:43 +01:00
Branislav Stojkovic
41d2b73cca
Merge switch configurations that yield with the same effective wiring
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for "Analyze Guitar Wirings" module, for more compact report
2019-03-14 22:26:49 +01:00
Branislav Stojkovic
3d0f9554b0
Honor all possible combinations of "DIP Switch" positions when creating
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a netlist
2019-03-14 10:32:51 +01:00
Branislav Stojkovic
0c21e013b4
improve node display for single point componenets
2019-03-14 10:03:04 +01:00
Branislav Stojkovic
f8e24b0937
Improve performance of netlist calculations
2019-03-14 00:08:39 +01:00
Branislav Stojkovic
e9a2785344
Honor "Terminal Strip" connectivity when creating a netlist
2019-03-13 20:54:24 +01:00
Branislav Stojkovic
4de3b6d97c
Output SPICE node names in the "Nxxx" format
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join all nodes connected to GND together
2019-03-13 19:23:35 +01:00
Branislav Stojkovic
92a2bb9809
fix "Ground Symbol" jumping
2019-03-10 22:58:36 +01:00
Branislav Stojkovic
1bc11e09ab
release
2019-03-10 22:36:09 +01:00
Branislav Stojkovic
49d93b42a4
update.xml
2019-03-10 17:51:21 +01:00
Branislav Stojkovic
b279510e5c
Detect when a file is created with a newer version of DIYLC and show a
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warning
Force correct prefix for transistors in spice
2019-03-10 09:03:22 +01:00
Branislav Stojkovic
a83cda9ecd
custom XStream converters for more compact files
2019-03-09 21:45:34 +01:00
Branislav Stojkovic
f63b422a8c
Cleaner XML format for .DIY files with less cross-references
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pinout update
2019-03-09 20:15:36 +01:00
Branislav Stojkovic
7af919b303
move section handling to base component interface
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do analysis in background thread
2019-03-09 18:01:42 +01:00
Branislav Stojkovic
1c1ec2fcf5
refactor transistor packages with a base class, add pinouts
2019-03-09 17:24:34 +01:00
Branislav Stojkovic
54ff518438
basic implementation of spice exporter
2019-03-09 14:46:00 +01:00
Branislav Stojkovic
8ed2c0c9a5
"Mini Toggle Switch" doesn't reset body size after changing terminal
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spacing
2019-03-08 18:36:37 +01:00
Branislav Stojkovic
2553ffbba7
z-order of building blocks
2019-03-04 10:34:53 +01:00
Branislav Stojkovic
c548a35939
3.55 release
2019-03-02 20:59:38 +01:00
Branislav Stojkovic
c0c226c580
improve tree analysis
2019-03-02 12:48:10 +01:00
Branislav Stojkovic
bc0d759d39
detect volume and tone pots
2019-03-02 12:31:02 +01:00
Branislav Stojkovic
b3497cdca8
Fix lever switch rotation issue
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Render pickup name instead of model
Netlist algorithm would sometimes create overlapping groups of nodes
which are supposed to be merged
2019-03-02 09:11:00 +01:00
Branislav Stojkovic
cc0f698c8b
detect humbucking or split mode
2019-03-01 20:49:07 +01:00
Branislav Stojkovic
c9a32cc390
better handling for cold start without logs folder
2019-02-28 23:40:29 +01:00
Branislav Stojkovic
9596d6ca8e
"Analyze Guitar Wiring" can figure out if wiring is hum-cancelling and
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in or out of phase for each position
2019-02-28 22:26:12 +01:00
Branislav Stojkovic
65315ed559
fix connectivity
2019-02-28 21:26:41 +01:00
Branislav Stojkovic
403d0ea433
Added two or four terminal hookup to bass pickups types
2019-02-28 19:11:02 +01:00
Branislav Stojkovic
84eaa1bf29
reuse awg calcs
2019-02-27 19:20:37 +01:00
Branislav Stojkovic
08aec6fa9b
startup fix
2019-02-26 23:27:32 +01:00
Branislav Stojkovic
8bfb3ade55
fix array comparison for byte[]
2019-02-26 16:20:40 +01:00
Branislav Stojkovic
67761b1027
error handling for analyzer
2019-02-26 10:25:20 +01:00
Branislav Stojkovic
7cca8f86b2
build 3.54
2019-02-26 10:10:42 +01:00
Branislav Stojkovic
b24bfafb39
add unit tests for netlist
2019-02-25 11:05:15 +01:00
Branislav Stojkovic
31ce46f147
minor image update
2019-02-24 14:49:35 +01:00
Branislav Stojkovic
ce43a5d2e6
Improve performance of "Image" component and greatly reduce file size
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when images are present
2019-02-24 14:32:30 +01:00
Branislav Stojkovic
0d007e5737
tree construction improvement
2019-02-24 13:15:30 +01:00
Branislav Stojkovic
c0dac1a1db
generate connectivity tree
2019-02-23 17:40:15 +01:00
Branislav Stojkovic
ec7244042d
wiring analysis improvements
2019-02-17 09:31:42 +01:00