Logo
Explore Help
Sign In
BDC/diy-layout-creator
2
0
Fork 0
You've already forked diy-layout-creator
mirror of https://github.com/bancika/diy-layout-creator synced 2026-11-10 09:12:09 +10:00
Code Issues Packages Projects Releases Wiki Activity
Files
b0ee56b0ccda0bd02c749dd2aba605a75c2e391c
diy-layout-creator/diylc
T
History
Bane Stojkovic b0ee56b0cc Apply z-order to highlight connected areas feature
2022-11-23 23:16:59 +01:00
..
diylc-core
Apply z-order to highlight connected areas feature
2022-11-23 23:16:59 +01:00
diylc-library
Circuit analysis algorithm that supports netlist extraction, 'Highlight connected Areas' and 'Guitar Wiring Analyzer' features improved to take PCB trace layer and component z-order into account for better accuracy
2022-11-23 22:50:01 +01:00
diylc-swing
Apply z-order to highlight connected areas feature
2022-11-23 23:16:59 +01:00
.DS_Store
…
eclipse-java-google-style.xml
…
HEADER.txt
…
Powered by Gitea Version: 1.26.4 Page: 1123ms Template: 42ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API