Commit Graph

544 Commits

Author SHA1 Message Date
Bane Stojkovic 14944a3e38 Release 4.36 2023-03-30 10:02:06 +02:00
Bane Stojkovic 48fe5f496b Fix fuse symbol 2023-03-29 09:38:27 +02:00
Bane Stojkovic 57a7932675 Improve backup file date format 2023-03-28 16:54:00 +02:00
Bane Stojkovic e0d2964e12 When backing up the configuration file, append the current timestamp at the end instead of a '~' 2023-03-28 16:35:40 +02:00
Bane Stojkovic c3f9208ab7 Fix issue deserializing building blocks 2023-03-28 16:12:33 +02:00
Bane Stojkovic 3a5e6f553d Fix issue with null value in inductor causing exceptions 2023-03-28 16:12:19 +02:00
Bane Stojkovic 24c8afd620 Configurable max switch combination count for circuit analysis (using org.diylc.maxSwitchCombinations argument) 2023-03-28 16:11:57 +02:00
Bane Stojkovic 2ce7677672 Title Block added as one of factory building blocks (was missing in 4.35 by mistake) 2023-03-26 13:48:58 +02:00
Bane Stojkovic 04a22436d2 Lever switch orientation not loaded correctly from files created prior to version 4.35 2023-03-26 13:48:26 +02:00
Bane Stojkovic 887be7338f Release 4.35 2022-12-23 18:20:53 +01:00
Bane Stojkovic 8211976044 Trace cut doesn't affect continuity of vero board traces 2022-12-23 08:24:43 +01:00
Bane Stojkovic 9bcc56f228 Added '1/8" Cliff Jack' component - stereo and mono 2022-12-15 23:25:49 +01:00
Bane Stojkovic 8178c72fbe New file icons for Mac OS 2022-12-14 23:10:32 +01:00
Bane Stojkovic ab53f7e85f 'Renumber On Paste' feature now applies to variants as well 2022-12-14 22:49:57 +01:00
Bane Stojkovic 7a186d0d49 Show wire gauge in the bom and project explorer 2022-12-14 22:15:40 +01:00
Bane Stojkovic b45ee77472 Upon starting or opening a project, the ruler is slightly misaligned with the project boundaries 2022-12-14 19:13:51 +01:00
Bane Stojkovic 796c825f02 Title Block added as one of factory building blocks 2022-12-14 18:31:28 +01:00
Bane Stojkovic 063cfde769 Diode symbol doesn't appear in the BOM 2022-12-14 12:29:45 +01:00
Bane Stojkovic b89a851513 Show jack type in the BOM 2022-12-13 18:39:16 +01:00
Bane Stojkovic b6f3020072 DIL IC pin labels don't match between the rendered values and values in the netlist 2022-12-12 23:35:02 +01:00
Bane Stojkovic f4f4ba7458 Ability to use up/down arrow keys in the project explorer to select components 2022-12-12 22:44:14 +01:00
Bane Stojkovic c7d5fe3cf4 Handle array value string representation 2022-12-12 01:17:53 +01:00
Bane Stojkovic 92f9c0c89a Added 'PCB Terminal Block' component 2022-12-12 01:03:07 +01:00
Bane Stojkovic 16d718ffc5 Added 'Solder Lug' component 2022-12-11 00:20:43 +01:00
Bane Stojkovic 03df6158e2 Use scroll buttons in 'Tabbed Toolbar' instead of arranging tabs into multiple lines when the screen is not large enough to show them all 2022-12-10 23:19:21 +01:00
Bane Stojkovic 895de4e7f2 Improved find tool usability, make the screen pan to the selected components 2022-12-09 23:13:55 +01:00
Bane Stojkovic 655f5253f6 Escape comma in BOM CSV files to avoid component names being split into separate columns 2022-12-09 22:46:44 +01:00
Bane Stojkovic 693315ec96 Release 4.34 2022-12-09 14:24:32 +01:00
Bane Stojkovic 7f49727966 Revert projectFileManager 2022-12-09 11:17:52 +01:00
Bane Stojkovic 3dc0f0d01b Cleanup 2022-12-08 23:11:50 +01:00
Bane Stojkovic c5a095cad9 Back compatibility fix for toggle switch 2022-12-08 22:32:34 +01:00
Bane Stojkovic be996d6494 Allow drag and drop reordering in project explorer 2022-12-07 23:43:05 +01:00
Bane Stojkovic a9c4f2807f Added Project Explorer 2022-12-06 22:53:45 +01:00
Bane Stojkovic 1ba5f1525b Keyboard shortcuts for toggling layer visibility using Ctrl + 1 through Ctrl + 5 2022-11-30 22:51:07 +01:00
Bane Stojkovic 72a00087c3 Optimized memory usage when having many Hookup Wire components 2022-11-27 13:36:34 +01:00
Bane Stojkovic 0c53c8918a Improved conductivity tracking of Terminal Strip 2022-11-27 13:00:34 +01:00
Bane Stojkovic 45b9532e66 Potentiometer bodies are no longer considered as conductive surfaces to avoid unwanted shorts 2022-11-26 11:20:00 +01:00
Bane Stojkovic d0f6c78b5b >Font settings (e.g. bold) sometimes bleed into a different components 2022-11-24 16:37:10 +01:00
Bane Stojkovic a7bdac4d52 Remove toggle interaction with pot back 2022-11-23 23:59:13 +01:00
Bane Stojkovic a9036e7b19 Update ContinuityGraph.java 2022-11-23 23:17:56 +01:00
Bane Stojkovic b0ee56b0cc Apply z-order to highlight connected areas feature 2022-11-23 23:16:59 +01:00
Bane Stojkovic 0957f3bc8f Update update.xml 2022-11-23 23:00:43 +01:00
Bane Stojkovic d3d98b3058 Circuit analysis algorithm that supports netlist extraction, 'Highlight connected Areas' and 'Guitar Wiring Analyzer' features improved to take PCB trace layer and component z-order into account for better accuracy 2022-11-23 22:50:01 +01:00
Bane Stojkovic ec5e1ae233 Revert "Rollback Include layer id in continuity areas"
This reverts commit 0f2e581a02.
2022-11-22 18:15:53 +01:00
Bane Stojkovic 0f2e581a02 Rollback Include layer id in continuity areas 2022-11-22 18:10:03 +01:00
Bane Stojkovic 50588a759d Variants of boards having explicit sizing mode fail when trying to add to a project 2022-11-20 22:51:55 +01:00
Bane Stojkovic 03ab0f1d95 Do not apply any user-default property values when creating a standard datasheet model (e.g. a capacitor) 2022-11-19 12:28:53 +01:00
Bane Stojkovic de04bd7ec1 Release 4.33 2022-11-16 23:53:00 +01:00
Bane Stojkovic e7fcebcf96 Fixed an issue that would cause capacitors to fail when creating, editing, moving or deleting 2022-11-16 22:44:36 +01:00
Bane Stojkovic 07f7382e56 Naming sync 2022-11-15 22:57:47 +01:00